Genvar |
Genvar is a variable used in a generate loop.
Syntax:
genvar name;
Description:
A genvar is a variable used in generate-for loop. It stores positive integer values. It differs from other Verilog variables in that it can be assigned values and changed during compilation and elaboration time.
The genvar must be declared within the module where it is used, but it can be declared either inside or outside of the generate loop.
Example:
generate genvar i; for (i = 0; i < 10; i = i + 1) begin : gen1 genvar j; for (j = i; j >= 1; j = j - 1) begin : gen2 reg [0:i] R; initial begin R = i; $display("%m", R); end end end endgenerate
참조 : http://www.hdlworks.com/hdl_corner/verilog_ref/items/Genvar.htm
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