[xilinx] ERROR:Pack:1107 - Unable to combine the following symbols into a single IOB

 

 

ERROR:Pack:1107 - Unable to combine the following symbols into a single IOB

   component:
    PAD symbol "gclk3_i" (Pad Signal = gclk3_i)
    BUF symbol "UPAD_CLK3" (Output Signal = hpi_clk)

 

 

또, 이 err를 해결해 보기 위해 xilinx forum에 들렸다...

누군가가

 

Try this Project--> clean up project files

and resynthesize your design

 

이렇게 해보라고 해서 해 봤지만, 역시나 안되었다. 이 forum의 의미가 의문이다.. 왜 있는 건지...

어쨌던.. xilinx 홈페이지의 support에 solution으로 아래와 같이 나왔다.

 

Solution

Since a partition can be implemented by itself, the tools will treat the borders of the partition as a wall and will not look through the border. In this case, the MGT REFCLK is on one side of this wall and the MGT on the other side. If MAP sees that the differential I/O is driving an MGT clock, it is treated differently, and mapped to a BUFDS and two IPAD components. If MAP does not see the MGT connection, the I/O is mapped to two IOB components instead. In this case, because the use of partitions blocks the MGT visibility, the I/O is incorrectly mapped to IOB components. To work around this issue, instantiate the IBUFDS for REFCLK in the same partition as the MGT. MAP can then relate the I/O as REFCLK signal and is allowed to place them in the appropriate IPAD sites.

 

그러나... 도움이 별로 안된다는 거..

이럴 땐 아래와 같이 해보자..

 

IBUF (I.(xx), O.(xx));    ==> IBUFG (I.(xx), O.(xx));

 

clk이 global로 연결되어야 하는데 그렇지 못할 경우 내부적으로 logic에 따라 어떤 경우 mapping이 안 될 수도 있기 때문에

아예 global buffer로 사용한다는 primitive를 선언해줘야 한다.

 

휴...--;