Overview
The purpose of this page is to provide a link to the user, where the user can download the Cyclone V Gen2 x4 AVMM DMA reference design.
Features
- Fast and easy to develop high performance PCIe Gen2x4 hardware with AVMM DMA IP for ACDS revision 16.0.2 or later
- Completed Quartus reference design is in the attached zipped file, which provides a pre-configured Qsys system
- Allows the user to modify the Qsys file and re-generate the design
- Includes Linux driver and application that works with the reference design
- Use built in AVMM DMA IP to transfer data between the on-chip memory in the FPGA and the system memory
- Support infinite loop to test the system and the IP stability
- For each loop, all transferred data are compared with data in the source location to guarantee data integrity
Requirements
- 16.0.2 ACDS
- A PC provides a PCI Express Gen2 x4 slot
- This reference design has been tested with Intel Ivy Bridge and Sandy Bridge
- The attached reference design
- The SOF is available in the folder pcie_quartus_files as top.sof
- Altera PCI Express Cyclone V Devkit with FPGA 5CGTFD9E5F35C7
- Refer to the link for details http://www.altera.com/products/devkits/altera/kit-cyclone-v-gt.html
- A system with either 32-bit or 64-bit Linux installed
- The attached Linux driver and application was developed in CentOS version 6.4 and 6.5 with Kernal 2.6.32. It has also been tested with other Linux OS, such as RedHat and Ubuntu.
Design Block Diagram
How to run the application
Follow the following instructions to install and run the application
- Copy the attached Linux application and driver into a folder
- Unzip the application and driver
- Open a Terminal in Linux and go to the folder where the application is copied and unzipped
- Log in as an Admin by type in "su" and enter the password
- Type in "make" to compile the driver and application. Just need to do it once in a system.
- Type in "./install" to install the driver
- Type in "./run" to run the application
In the application, there are multiple options to configure the software. The user can run read DMA (move data from system memory to the on-chip memory in the FPGA), write DMA (move data from on-chip memory to system memory), or simultaneous read and write. The user can also control the transfer size of each descriptor, the number of descriptors, and how many loops the DMA runs. There is description to explain all the options when the application is started. To run the DMA, type in "1" to start it.
Download
Hardware Download
Revision 1
The reference design was created by ACDS 14.0
Link to download the project File:Cv x4 g2 5CGTFD9E5F35C7 avmm dma.zip
Revision 2
The reference design was created by ACDS 15.1.2
Link to download the project File:PCIe CVGT AVMM DMA on Chip Mem 151.2.qar
Revision 3
The reference design was created by ACDS 16.0.2
Updated used of BAR4 in DMA application
Link to download the project File:PCIe CVGT AVMM DMA on Chip Mem 1602.zip
Software Download
Revision 1
Link to download the application and driver File:G2x4 avmm dma Linux.tar.gz
Revision 2
Updated used of BAR4 in DMA application
only for reference design revision 3 (created by ACDS 16.0.2)
Link to download the application and driver File:Linux for AVMM DMA on Chip Mem.tar.gz
출처 : http://www.alterawiki.com/wiki/Reference_Design:_Gen2x4_AVMM_DMA_-_Cyclone_V