[FPGA]

PLL(Phase-Locked Loop) 과 DLL(Delay-Locked Loop)

Neo Park 2012. 10. 25. 16:52

 

PLL(Phase-Locked Loop) 과 DLL(Delay-Locked Loop)

 

1. PLL의 기능과 용도 ·
2. 아날로그 PLL의 동작 ·
3. 위상검출기(phase detector) ·
4. 전압제어 발진기(voltage controlled oscillator: VCO) ·
5. 전하펌프(charge-pump) PLL ·
6. Delay-locked loop(DLL) ·
7. 클락 데이터복원회로(CDR) ·

 

 

 

Phase-Locked Loop 와 Delay-Locked Loop.pdf 

PLL-DLL_설계_및_응용.pdf

Phase-Locked Loop 와 Delay-Locked Loop.pdf
0.56MB
PLL-DLL_설계_및_응용.pdf
0.94MB